Stone Pillar TestChipBuilder

Complete Test Chip Layout System -- Stone Pillar TestChipBuilder offers a complete, integrated, graphically driven system for test structure generation. TestChipBuilder can automatically vary the geometries from a library of devices types or from completely customizable structures defined using our unique Javascript-based template building capabilities. The devices can automatically be included within a user configurable pad ring. The resulting test chip can be automatically routed using controlled wiring attributes.

Test chips can automatically be updated to reflect changes to DRC rules. The generated structures can be stored as hierarchical GDS2. Contact names are automatically assigned to facilitate test plan development. Linking between test results and test structure layout is automatically created and maintained by the Stone Pillar Suite data handler.

Features & Benefits

  • Automatically create variations on individual test device structures based on easily specified device templates

  • Automatically create RF test structures like short, open, and through for each test device

  • Automatically connect devices to flexible pad rings with user controlled interconnect attributes

  • Javascript based template definition provides flexible, efficient, open basis for device, pad ring, and interconnect templates

  • Automatically generate complete, accurate, up-to-date documentation

  • Create complete test chips with dozens of variations at the touch of a button

  • Automatically feed terminal information into test plans

  • Export GDS2 as complete test chip or individual device hierarchy

  • Automatically revise structures in response to changes in design rules

  • Test chip, test coverage utilization analysis

  • Automatically create layout-based computational experiments

Stone Pillar LayoutViewer

Integrated Device Layout Viewing Tool -- Stone Pillar LayoutViewer offers an integrated visual test structure reference capability, linked to experimental or other data. This tool can be invoked to easily confirm the structure used to perform an electrical test.

GDS2 test chips are read into the common database model so that individual test structure layouts can be visualized during the course of data interrogation.

Features & Benefits

  • Cross-reference test structure visualization from measured data

  • Rapidly clarify device specific layout design rules during data analysis

  • Rapidly access a test chip's contents

  • Indicate test structures of interest directly to test engineering

  • Refer to specific test structure layouts in real time during engineering discussions

  • Avoid mistakes derived from errors in test structure documentation

  • Direct correlation from test result to test structure visualization

  • Direct GDS2 test chip loading

  • Manage test programs in conjunction with test chips

  • Test chip, test coverage analysis

  • Find test structures via quad or structure name

  • List and visualize tested structures by lot or wafer

  • Find and visualize test structures by device type

For a more detailed look at how one customer benefited from the use of Stone Pillar TestChipBuilder, click here for a white paper describing their experience.

For a more detailed look at how Stone Pillar can help speed your test chip needs through services provided with TestChipBuilder, click here for a short presentation describing our test chip layout services.


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