Test Chip Automation using Stone Pillar SuiteTM TestChipBuilder

TestChipBuilder automates the process of generating, documenting, and revising technology development test chips.

The methodology used in TestChipBuilder is to create a parameterized devices. These "template" devices are created within the graphical environment provided by the TemplateBuilder component of TestChipBuilder.

For example, you can define a PMOS device which includes the varibles L and W which will be used to create device variations within a test chip. The devices can be defined using javascript and can be visually reviewed using capabilities provided in TestChipBuilder.

After defining devices and their variations, you can typically use a prepared pad ring template and routing template to assemble a complete test chip. This is done by filling in values and variations for the device parameters defined in the previous step. These variations, coupled with options regarding how the devices should be placed, routed, and configured are fed into the assembly capabilities of TestChipBuilder.

TestChipBuilder then creates a complete test chip layout which you can review graphically.

If the test chip meets your requirements, TestChipBuilder facilitates several forms of output including GDS, PDF documentation, SKILL for parameterized devices, and database entry for subsequent test application or data analysis steps.

More details about these capabilities are available in the product and applications sections.



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