Technology Development using Stone Pillar SuiteTMStone Pillar Suite provides tools to assist with all aspects of semiconductor technology development. These tools provide maximum benefit when used in concert to interconnect the many facets of technology development.
A possible workflow for technology development is illustrated in the figure below. This illustrates the steps from initial supported device and performance target setting in the upper left of the diagram through to process monitoring and report generation in the lower left. In between are several stages including test chip creation, DRC rule creation, experiment design, wafer fab, and electrical test and analysis and SPICE model creation and monitoring.
Many of these processes are iterative. In fact the whole process can be iterated or individual steps or groups of steps may by the subject of iterative process improvement.
This figure illustrates the steps involved in a typical technology development cycle.
The next figure shows how the tools of Stone Pillar Suite overlay on these operations. Each box in the original figure is addressed by one or more of the tools of Stone Pillar Suite.
The tools of Stone PIllar Suite facilitate the operations involved in technology development as illustrated in this figure. The tools named in each box address the operations shown in the preceeding figure.
For example, in a complete deployment if Stone Pillar Suite, several advantages would speed the steps in the process illustrated above.
More details about these capabilities are included in the information about individual products and also the other detailed application descriptions.